1. Field of the Invention
The present invention relates to a manufacturing method of forming a lamination device by lamination of semiconductor devices.
2. Description of the Related Art
In a semiconductor device manufacturing step, the front surface of a generally disk-like semiconductor wafer is sectioned into a plurality of areas by predetermined dividing lines called streets arranged in a lattice pattern and devices such as ICs, LSIs, or the like are formed in the areas thus sectioned. In addition, the semiconductor wafer is cut along the streets to divide the areas formed with the devices for manufacturing individual devices.
In order to enhance the function of the semiconductor device, lamination devices or stacked devices in which individual devices are laminated or stacked one on another are put to practical use. A method of manufacturing a lamination device in which individual devices are laminated one on another is disclosed by Japanese Patent Laid-open No. Sho 60-206058. In the lamination device manufacturing method disclosed by this laid-open bulletin, a wafer is ground from the rear surface thereof to have a thickness of about 200 μm. A front surface of each of the plurality of wafers whose rear surfaces were ground as described above is faced to and joined to a rear surface of another wafer with corresponding streets aligned with each other to form a lamination wafer. Thereafter, the lamination wafer is cut along the streets by a dicing device such as a cutting device or the like to form lamination devices.
In this way, if five wafers are laminated, since a wafer has a thickness of about 200 μm, the lamination device has a thickness of 1000 μm or more. In recent years, electric equipment has highly been demanded to be reduced in weight and in size. A wafer may be formed to have a thickness of 100 μm or less. In such a case, even if ten or more wafers are laminated, the lamination wafer can be made to have a thickness of 1000 μm or less, which can further enhance the function of the lamination device. However, if the wafer is formed to have a thickness of 100 μm or less, it significantly lowers in rigidity to become fragile. This poses a problem in that it is difficult to handle, such as convey and laminate, the wafer.
On the other hand, Japanese Patent Laid-open No. 2007-19461 discloses a wafer that can ensure rigidity even if it is reduced in thickness. The wafer disclosed in this laid-open bulletin includes a device area formed with a plurality of devices and an outer circumferential surrounding area surrounding the device area. In addition, the wafer is ground from the rear surface corresponding to the device area so that the device area may have a predetermined thickness and the outer circumferential surrounding area of the rear surface of the wafer is left to form an annular reinforced portion.